library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_signed.all;
use ieee.std_logic_unsigned.all;

--******************************************************************************
--** ENTITY PBUFFER
--**
--** Deskripsi: Struktur entity ini menguraiakan BUFFER. 
--******************************************************************************
entity pbuffer is
	port(ReadAddress, FetchAddress, Data : in std_logic_vector(15 downto 0);
		 pbwe, clk : in std_logic;
		 lastFetchedAddress, instruction : out std_logic_vector(15 downto 0);
		 miss : out std_logic);
end entity pbuffer;

architecture structural_pbuffer of pbuffer is
	--Declare Signals Needed
	signal tag : std_logic_vector(13 downto 0);
	signal validbit : std_logic;
	
begin
	
	select1 : work.pref
		--This selects either the Register or Immediate Option
		port map(FetchAddress, Data, ReadAddress(1 downto 0), pbwe, clk, 
				 instruction, lastFetchedAddress, tag, validbit);
	
	select2 : work.pref_c
		--This selects either the Register or Shift Immediate Option
		port map(ReadAddress(15 downto 2), tag, validbit, miss);

end architecture structural_pbuffer;

