
function pid_sg_full_001_config(this_block)
  this_block.setTopLevelLanguage('VHDL');

  this_block.setEntityName('pid_sg_full_001');
  this_block.addSimulinkInport('gateway_in1');
  this_block.port('gateway_in1').useHDLVector(true);

  this_block.addSimulinkOutport('gateway_out');
  this_block.port('gateway_out').useHDLVector(true);
  this_block.port('gateway_out').setType('Fix_20_8');

  this_block.tagAsCombinational;

% -----------------------------
  % Do input type checking, and dynamic output type and 
  % generic setup here.
  if (this_block.inputTypesKnown)
    if (~ strcmp('Fix_16_4', this_block.port('gateway_in1').type))
      this_block.setError('Input data type for port "gateway_in1" must be "Fix_16_4".');
    end
  end

% -----------------------------

% -----------------------------
% Do input rate checking here.
  if (this_block.inputRatesKnown)
    if (this_block.port('gateway_in1').rate ~= 1)
      this_block.setError('Rate for port "gateway_in1" must be 1.');
    end
  end

% -----------------------------

% -----------------------------
% Set output rates here.
  this_block.port('gateway_out').setRate(1);


% -----------------------------
% Set up clocks and clock enables here.
  this_block.addClkCEPair('clk_sg', 'ce_sg', 1);


% -----------------------------
% Set up vhdl/verilog files here.
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/conv_pkg.vhd');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/clock_pkg.vhd');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/synth_reg.vhd');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/synth_reg_w_init.vhd');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/xlclkprobe.vhd');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/xlclockdriver.vhd');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/xlclockgenerator.vhd');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/xlsl2slv.vhd');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/xlslv2sl.vhd');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/synth_addsub.vhd');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/pid_sg_full_001_addsub1.vhd');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/synth_addsub.vhd');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/synth_addsub.vhd');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/synth_addsub.vhd');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/synth_addsub.vhd');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/synth_addsub.vhd');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/pid_sg_full_001_cmult3.vhd');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/xldelay.vhd');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/pid_sg_full_001.vhd');


% -----------------------------
% Set up .edn, .mif, .coe, ... files here.
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/adder_subtracter_spartan2_6_0_317484e55db19a4e.edn');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/adder_subtracter_spartan2_6_0_43856abc3712fb4f.edn');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/adder_subtracter_spartan2_6_0_438ebd1a25415d4b.edn');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/adder_subtracter_spartan2_6_0_7e2e2ff90f08677d.edn');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/adder_subtracter_spartan2_6_0_86c498140491d6df.edn');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/adder_subtracter_spartan2_6_0_b0bfdb99fc98b3ec.edn');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/multiplier_spartan2_6_0_378271e886b68b2a.edn');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/multiplier_spartan2_6_0_c898a6c13135c6d0.edn');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/multiplier_spartan2_6_0_e5bc92dce938ed6f.edn');
  this_block.addFile('C:/MATLAB6p5/work/xpid_sg_full_001/temp/multiplier_spartan2_6_0_ec7571a02d602c36.edn');

