VERSION 6
BEGIN SCHEMATIC
    BEGIN ATTR DeviceFamilyName "spartan2"
        DELETE all:0
        EDITNAME all:0
        EDITTRAIT all:0
    END ATTR
    BEGIN NETLIST
        SIGNAL XLXN_1
        SIGNAL clock
        SIGNAL reset
        SIGNAL in_x_0(15:0)
        SIGNAL out_s7(23:0)
        SIGNAL out_s7(7:0)
        SIGNAL out_s7(15:8)
        SIGNAL out_s7(23:16)
        SIGNAL anode0
        SIGNAL anode1
        SIGNAL anode2
        SIGNAL anode3
        SIGNAL cathode(7:0)
        SIGNAL XLXN_21
        SIGNAL XLXN_30
        PORT Input clock
        PORT Input reset
        PORT Input in_x_0(15:0)
        PORT Output anode0
        PORT Output anode1
        PORT Output anode2
        PORT Output anode3
        PORT Output cathode(7:0)
        BEGIN BLOCKDEF clk_d10ms
            TIMESTAMP 2005 8 23 7 21 44
            RECTANGLE N 64 -64 320 0 
            LINE N 64 -32 0 -32 
            LINE N 320 -32 384 -32 
        END BLOCKDEF
        BEGIN BLOCKDEF clk_div
            TIMESTAMP 2005 8 23 7 39 24
            RECTANGLE N 64 -128 320 0 
            LINE N 64 -96 0 -96 
            LINE N 64 -32 0 -32 
            LINE N 320 -96 384 -96 
        END BLOCKDEF
        BEGIN BLOCKDEF seg7_driver
            TIMESTAMP 2005 7 29 6 48 54
            RECTANGLE N 64 -320 320 0 
            LINE N 64 -288 0 -288 
            LINE N 64 -224 0 -224 
            LINE N 64 -160 0 -160 
            RECTANGLE N 0 -172 64 -148 
            LINE N 64 -96 0 -96 
            RECTANGLE N 0 -108 64 -84 
            LINE N 64 -32 0 -32 
            RECTANGLE N 0 -44 64 -20 
            LINE N 320 -288 384 -288 
            LINE N 320 -224 384 -224 
            LINE N 320 -160 384 -160 
            LINE N 320 -96 384 -96 
            LINE N 320 -32 384 -32 
            RECTANGLE N 320 -44 384 -20 
        END BLOCKDEF
        BEGIN BLOCKDEF spartan2_clk_wrapper
            TIMESTAMP 2005 8 12 5 29 44
            RECTANGLE N 64 -192 320 0 
            LINE N 64 -160 0 -160 
            LINE N 64 -96 0 -96 
            LINE N 64 -32 0 -32 
            RECTANGLE N 0 -44 64 -20 
            LINE N 320 -160 384 -160 
            RECTANGLE N 320 -172 384 -148 
        END BLOCKDEF
        BEGIN BLOCKDEF vcc
            TIMESTAMP 2001 2 2 12 52 44
            LINE N 64 -32 64 -64 
            LINE N 64 0 64 -32 
            LINE N 96 -64 32 -64 
        END BLOCKDEF
        BEGIN BLOCK XLXI_2 clk_div
            PIN clock_sys clock
            PIN reset reset
            PIN clock_div XLXN_1
        END BLOCK
        BEGIN BLOCK XLXI_3 seg7_driver
            PIN clk_200hz XLXN_1
            PIN reset reset
            PIN dig0(7:0) out_s7(7:0)
            PIN dig1(7:0) out_s7(15:8)
            PIN dig2(7:0) out_s7(23:16)
            PIN anode0 anode0
            PIN anode1 anode1
            PIN anode2 anode2
            PIN anode3 anode3
            PIN digit(7:0) cathode(7:0)
        END BLOCK
        BEGIN BLOCK XLXI_4 spartan2_clk_wrapper
            PIN ce XLXN_21
            PIN clk XLXN_30
            PIN in_x_0(15:0) in_x_0(15:0)
            PIN out_x_0(23:0) out_s7(23:0)
        END BLOCK
        BEGIN BLOCK XLXI_5 vcc
            PIN P XLXN_21
        END BLOCK
        BEGIN BLOCK XLXI_10 clk_d10ms
            PIN clock_sys clock
            PIN clock_div10ms XLXN_30
        END BLOCK
    END NETLIST
    BEGIN SHEET 1 3520 2720
        BEGIN INSTANCE XLXI_4 1488 1568 R0
        END INSTANCE
        BEGIN INSTANCE XLXI_3 1632 1168 R0
        END INSTANCE
        BEGIN BRANCH XLXN_1
            WIRE 1008 880 1632 880
        END BRANCH
        BEGIN INSTANCE XLXI_2 624 976 R0
        END INSTANCE
        BEGIN BRANCH clock
            WIRE 464 880 544 880
            WIRE 544 880 624 880
            WIRE 544 880 544 1344
            WIRE 544 1344 816 1344
        END BRANCH
        BEGIN BRANCH reset
            WIRE 464 944 576 944
            WIRE 576 944 624 944
            WIRE 576 944 576 1072
            WIRE 576 1072 1088 1072
            WIRE 1088 944 1088 1072
            WIRE 1088 944 1632 944
        END BRANCH
        IOMARKER 464 880 clock R180 28
        IOMARKER 464 944 reset R180 28
        BEGIN BRANCH in_x_0(15:0)
            WIRE 1456 1536 1488 1536
        END BRANCH
        IOMARKER 1456 1536 in_x_0(15:0) R180 28
        BEGIN BRANCH out_s7(23:0)
            WIRE 1872 1408 1904 1408
        END BRANCH
        BEGIN BRANCH out_s7(7:0)
            WIRE 1600 1008 1632 1008
        END BRANCH
        BEGIN BRANCH out_s7(15:8)
            WIRE 1600 1072 1632 1072
        END BRANCH
        BEGIN BRANCH out_s7(23:16)
            WIRE 1600 1136 1632 1136
        END BRANCH
        BEGIN BRANCH anode0
            WIRE 2016 880 2048 880
        END BRANCH
        IOMARKER 2048 880 anode0 R0 28
        BEGIN BRANCH anode1
            WIRE 2016 944 2048 944
        END BRANCH
        IOMARKER 2048 944 anode1 R0 28
        BEGIN BRANCH anode2
            WIRE 2016 1008 2048 1008
        END BRANCH
        IOMARKER 2048 1008 anode2 R0 28
        BEGIN BRANCH anode3
            WIRE 2016 1072 2048 1072
        END BRANCH
        IOMARKER 2048 1072 anode3 R0 28
        BEGIN BRANCH cathode(7:0)
            WIRE 2016 1136 2048 1136
        END BRANCH
        IOMARKER 2048 1136 cathode(7:0) R0 28
        BEGIN BRANCH XLXN_21
            WIRE 1424 1280 1424 1408
            WIRE 1424 1408 1488 1408
        END BRANCH
        BEGIN BRANCH XLXN_30
            WIRE 1200 1344 1344 1344
            WIRE 1344 1344 1344 1472
            WIRE 1344 1472 1488 1472
        END BRANCH
        INSTANCE XLXI_5 1360 1280 R0
        BEGIN INSTANCE XLXI_10 816 1376 R0
        END INSTANCE
    END SHEET
END SCHEMATIC
