Release 6.2i - netgen G.28
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.

Loading device database for application netgen from file
"pid_sg_full_001_clk_wrapper.ncd".
   "pid_sg_full_001_clk_wrapper" is an NCD, version 2.38, device xc2s50, package
pq208, speed -6
Loading device for application netgen from file 'v50.nph' in environment
C:/Xilinx.
Loading constraints from file "pid_sg_full_001_clk_wrapper.pcf"...
  Flattening design ...
  Flattening design completed.
  Specializing design ...
  Specializing design completed.
  Preping physical only global signals ...
  Preping design's networks ...
  Preping design's macros ...
Writing VHDL netlist pid_sg_full_001_clk_wrapper_timesim.vhd ...
Writing VHDL SDF file pid_sg_full_001_clk_wrapper_timesim.sdf ...
Total memory usage is 52672 kilobytes
