V1 71
FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd 2005/03/27.20:48:37
EN work/SRL17E          FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      PB ieee/STD_LOGIC_1164 PB work/CONV_PKG
AR work/SRL17E/STRUCTURAL \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      EN work/SRL17E    CP SRL16E         CP FDE
EN work/SYNTH_REG       FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      PB ieee/STD_LOGIC_1164 PB work/CONV_PKG
AR work/SYNTH_REG/STRUCTURAL \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      EN work/SYNTH_REG CP SRL17E
EN work/SYNTH_REG_REG \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      PB ieee/STD_LOGIC_1164 PB work/CONV_PKG
AR work/SYNTH_REG_REG/BEHAV \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      EN work/SYNTH_REG_REG
EN work/SINGLE_REG_W_INIT \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      PB ieee/STD_LOGIC_1164 PB work/CONV_PKG
AR work/SINGLE_REG_W_INIT/STRUCTURAL \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      EN work/SINGLE_REG_W_INIT CP FDRE   CP FDSE
EN work/SYNTH_REG_W_INIT \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      PB ieee/STD_LOGIC_1164 PB work/CONV_PKG
AR work/SYNTH_REG_W_INIT/STRUCTURAL \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      EN work/SYNTH_REG_W_INIT CP SINGLE_REG_W_INIT
EN work/XLCLKPROBE \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      PB ieee/STD_LOGIC_1164 PH work/CLOCK_PKG PB work/CONV_PKG
AR work/XLCLKPROBE/BEHAVIOR \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      EN work/XLCLKPROBE
EN work/XLCLOCKDRIVER \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      PB ieee/STD_LOGIC_1164 PH ieee/NUMERIC_STD PB work/CONV_PKG
AR work/XLCLOCKDRIVER/BEHAVIOR \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      EN work/XLCLOCKDRIVER CP SYNTH_REG_W_INIT CP BUFG
EN work/XLCLOCKGENERATOR \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      PB ieee/STD_LOGIC_1164
AR work/XLCLOCKGENERATOR/STRUCTURAL \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      EN work/XLCLOCKGENERATOR CP DCM     CP BUFGMUX        CP FDRE           CP BUFG
EN work/XLSL2SLV        FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB work/CONV_PKG
AR work/XLSL2SLV/BEHAVIOR \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      EN work/XLSL2SLV
EN work/XLSLV2SL        FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB work/CONV_PKG
AR work/XLSLV2SL/BEHAVIOR \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      EN work/XLSLV2SL
EN work/SYNTH_ADDSUB \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      PB ieee/STD_LOGIC_1164 PH ieee/NUMERIC_STD PB work/CONV_PKG
AR work/SYNTH_ADDSUB/BEHAVIOR \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      EN work/SYNTH_ADDSUB CP SYNTH_REG
EN work/PID_SG_FULL_001_ADDSUB1 \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB work/CONV_PKG
AR work/PID_SG_FULL_001_ADDSUB1/BEHAVIOR \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      EN work/PID_SG_FULL_001_ADDSUB1 CP SYNTH_ADDSUB \
      CP ADDER_SUBTRACTER_SPARTAN2_6_0_438EBD1A25415D4B \
      CP ADDER_SUBTRACTER_SPARTAN2_6_0_317484E55DB19A4E \
      CP ADDER_SUBTRACTER_SPARTAN2_6_0_86C498140491D6DF \
      CP ADDER_SUBTRACTER_SPARTAN2_6_0_43856ABC3712FB4F \
      CP ADDER_SUBTRACTER_SPARTAN2_6_0_7E2E2FF90F08677D \
      CP ADDER_SUBTRACTER_SPARTAN2_6_0_B0BFDB99FC98B3EC CP SYNTH_REG
EN work/PID_SG_FULL_001_CMULT3 \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB work/CONV_PKG
AR work/PID_SG_FULL_001_CMULT3/BEHAVIOR \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      EN work/PID_SG_FULL_001_CMULT3 CP MULTIPLIER_SPARTAN2_6_0_C898A6C13135C6D0 \
      CP MULTIPLIER_SPARTAN2_6_0_378271E886B68B2A \
      CP MULTIPLIER_SPARTAN2_6_0_EC7571A02D602C36 \
      CP MULTIPLIER_SPARTAN2_6_0_E5BC92DCE938ED6F CP SYNTH_REG
EN work/XLDELAY         FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      PB ieee/STD_LOGIC_1164 PB work/CONV_PKG
AR work/XLDELAY/BEHAVIOR \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      EN work/XLDELAY   CP SYNTH_REG      CP SYNTH_REG_REG
EN work/PID_SG_FULL_001 \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      PB ieee/STD_LOGIC_1164 PH work/CLOCK_PKG PB work/CONV_PKG
AR work/PID_SG_FULL_001/STRUCTURAL \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      EN work/PID_SG_FULL_001 CP WORK/PID_SG_FULL_001_ADDSUB1 \
      CP WORK/PID_SG_FULL_001_CMULT3 CP WORK/XLDELAY CP WORK/XLSL2SLV
EN work/PID_SG_FULL_001_CLOCK_DRIVER \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      PB ieee/STD_LOGIC_1164 PH work/CLOCK_PKG PB work/CONV_PKG
AR work/PID_SG_FULL_001_CLOCK_DRIVER/STRUCTURAL \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_files.vhd \
      EN work/PID_SG_FULL_001_CLOCK_DRIVER CP XLCLOCKDRIVER
FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_pkgs.vhd 2005/03/27.20:48:37
PH work/CONV_PKG        FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_pkgs.vhd \
      PB ieee/STD_LOGIC_1164 PH ieee/NUMERIC_STD
PB work/CONV_PKG        FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_pkgs.vhd \
      PH work/CONV_PKG
PH work/CLOCK_PKG       FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_pkgs.vhd \
      PB ieee/STD_LOGIC_1164
FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_clk_wrapper.vhd 2005/03/27.20:48:30
EN work/PID_SG_FULL_001_CLK_WRAPPER \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_clk_wrapper.vhd \
      PB ieee/STD_LOGIC_1164 PH work/CLOCK_PKG PB work/CONV_PKG
AR work/PID_SG_FULL_001_CLK_WRAPPER/STRUCTURAL \
      FL C:/MATLAB6p5/work/xpid_sg_full_001/pid_sg_full_001_clk_wrapper.vhd \
      EN work/PID_SG_FULL_001_CLK_WRAPPER CP PID_SG_FULL_001_CLOCK_DRIVER \
      CP PID_SG_FULL_001 CP XLCLKPROBE
