(edif test (edifVersion 2 0 0) (edifLevel 0) (keywordMap (keywordLevel 0))
(status (written (timeStamp 2005 5 15 12 58 26)
   (author "Xilinx, Inc.")
   (program "Xilinx CORE Generator" (version "Xilinx CORE Generator 6.2i"))))
   (comment "                                                                                
      This file is owned and controlled by Xilinx and must be used              
      solely for design, simulation, implementation and creation of             
      design files limited to Xilinx devices or technologies. Use               
      with non-Xilinx devices or technologies is expressly prohibited           
      and immediately terminates your license.                                  
                                                                                
      XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION 'AS IS'             
      SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR                   
      XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE, OR INFORMATION           
      AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION               
      OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS                 
      IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,                   
      AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE          
      FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY                  
      WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE                   
      IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR            
      REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF           
      INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS           
      FOR A PARTICULAR PURPOSE.                                                 
                                                                                
      Xilinx products are not intended for use in life support                  
      appliances, devices, or systems. Use in such applications are             
      expressly prohibited.                                                     
                                                                                
      (c) Copyright 1995-2003 Xilinx, Inc.                                      
      All rights reserved.                                                      
                                                                                
   ")
   (comment "Core parameters: ")
       (comment "c_has_bypass_with_cin = false ")
       (comment "c_a_type = 1 ")
       (comment "c_has_sclr = true ")
       (comment "c_sync_priority = 1 ")
       (comment "c_has_aset = false ")
       (comment "c_has_b_out = false ")
       (comment "c_has_s = false ")
       (comment "c_has_q = true ")
       (comment "InstanceName = adder_subtracter_spartan2_6_0_565e6fc4f8af6f53 ")
       (comment "c_family = virtex ")
       (comment "c_bypass_enable = false ")
       (comment "c_b_constant = false ")
       (comment "c_has_ovfl = false ")
       (comment "c_high_bit = 8 ")
       (comment "c_latency = 1 ")
       (comment "c_sinit_val = 0 ")
       (comment "c_has_bypass = false ")
       (comment "c_pipe_stages = 1 ")
       (comment "c_has_sset = false ")
       (comment "c_has_ainit = false ")
       (comment "c_has_a_signed = false ")
       (comment "c_has_q_c_out = false ")
       (comment "c_b_type = 1 ")
       (comment "c_has_add = false ")
       (comment "c_has_sinit = false ")
       (comment "c_has_b_in = false ")
       (comment "c_has_b_signed = false ")
       (comment "c_bypass_low = false ")
       (comment "c_enable_rlocs = true ")
       (comment "c_b_value = 0 ")
       (comment "c_add_mode = 0 ")
       (comment "c_has_aclr = false ")
       (comment "c_out_width = 9 ")
       (comment "c_ainit_val = 0000 ")
       (comment "c_low_bit = 0 ")
       (comment "c_has_q_ovfl = false ")
       (comment "c_has_q_b_out = false ")
       (comment "c_has_c_out = false ")
       (comment "c_b_width = 9 ")
       (comment "c_a_width = 9 ")
       (comment "c_sync_enable = 0 ")
       (comment "c_has_ce = true ")
       (comment "c_has_c_in = false ")
   (external xilinxun (edifLevel 0)
      (technology (numberDefinition))
       (cell VCC (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port P (direction OUTPUT))
               )
           )
       )
       (cell GND (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port G (direction OUTPUT))
               )
           )
       )
       (cell FDRE (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port D (direction INPUT))
                   (port C (direction INPUT))
                   (port CE (direction INPUT))
                   (port R (direction INPUT))
                   (port Q (direction OUTPUT))
               )
           )
       )
       (cell LUT4 (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port I0 (direction INPUT))
                   (port I1 (direction INPUT))
                   (port I2 (direction INPUT))
                   (port I3 (direction INPUT))
                   (port O (direction OUTPUT))
               )
           )
       )
       (cell MUXCY (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port DI (direction INPUT))
                   (port CI (direction INPUT))
                   (port S (direction INPUT))
                   (port O (direction OUTPUT))
               )
           )
       )
       (cell XORCY (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port LI (direction INPUT))
                   (port CI (direction INPUT))
                   (port O (direction OUTPUT))
               )
           )
       )
   )
(library test_lib (edifLevel 0) (technology (numberDefinition (scale 1 (E 1 -12) (unit Time))))
(cell adder_subtracter_spartan2_6_0_565e6fc4f8af6f53
 (cellType GENERIC) (view view_1 (viewType NETLIST)
  (interface
   (port ( rename A_0_ "A(0)") (direction INPUT))
   (port ( rename A_1_ "A(1)") (direction INPUT))
   (port ( rename A_2_ "A(2)") (direction INPUT))
   (port ( rename A_3_ "A(3)") (direction INPUT))
   (port ( rename A_4_ "A(4)") (direction INPUT))
   (port ( rename A_5_ "A(5)") (direction INPUT))
   (port ( rename A_6_ "A(6)") (direction INPUT))
   (port ( rename A_7_ "A(7)") (direction INPUT))
   (port ( rename A_8_ "A(8)") (direction INPUT))
   (port ( rename B_0_ "B(0)") (direction INPUT))
   (port ( rename B_1_ "B(1)") (direction INPUT))
   (port ( rename B_2_ "B(2)") (direction INPUT))
   (port ( rename B_3_ "B(3)") (direction INPUT))
   (port ( rename B_4_ "B(4)") (direction INPUT))
   (port ( rename B_5_ "B(5)") (direction INPUT))
   (port ( rename B_6_ "B(6)") (direction INPUT))
   (port ( rename B_7_ "B(7)") (direction INPUT))
   (port ( rename B_8_ "B(8)") (direction INPUT))
   (port ( rename CLK "CLK") (direction INPUT))
   (port ( rename CE "CE") (direction INPUT))
   (port ( rename SCLR "SCLR") (direction INPUT))
   (port ( rename Q_0_ "Q(0)") (direction OUTPUT))
   (port ( rename Q_1_ "Q(1)") (direction OUTPUT))
   (port ( rename Q_2_ "Q(2)") (direction OUTPUT))
   (port ( rename Q_3_ "Q(3)") (direction OUTPUT))
   (port ( rename Q_4_ "Q(4)") (direction OUTPUT))
   (port ( rename Q_5_ "Q(5)") (direction OUTPUT))
   (port ( rename Q_6_ "Q(6)") (direction OUTPUT))
   (port ( rename Q_7_ "Q(7)") (direction OUTPUT))
   (port ( rename Q_8_ "Q(8)") (direction OUTPUT))
   )
  (contents
   (instance VCC (viewRef view_1 (cellRef VCC  (libraryRef xilinxun))))
   (instance GND (viewRef view_1 (cellRef GND  (libraryRef xilinxun))))
   (instance BU3
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "r4c0.S1"))
      (property INIT (string "6666"))
   )
   (instance BU4
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "r4c0.S1"))
   )
   (instance BU5
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "r4c0.S1"))
   )
   (instance BU7
      (viewRef view_1 (cellRef FDRE (libraryRef xilinxun)))
      (property RLOC (string "r4c0.S1"))
   )
   (instance BU9
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "r4c0.S1"))
      (property INIT (string "6666"))
   )
   (instance BU10
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "r4c0.S1"))
   )
   (instance BU11
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "r4c0.S1"))
   )
   (instance BU13
      (viewRef view_1 (cellRef FDRE (libraryRef xilinxun)))
      (property RLOC (string "r4c0.S1"))
   )
   (instance BU15
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "r3c0.S1"))
      (property INIT (string "6666"))
   )
   (instance BU16
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "r3c0.S1"))
   )
   (instance BU17
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "r3c0.S1"))
   )
   (instance BU19
      (viewRef view_1 (cellRef FDRE (libraryRef xilinxun)))
      (property RLOC (string "r3c0.S1"))
   )
   (instance BU21
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "r3c0.S1"))
      (property INIT (string "6666"))
   )
   (instance BU22
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "r3c0.S1"))
   )
   (instance BU23
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "r3c0.S1"))
   )
   (instance BU25
      (viewRef view_1 (cellRef FDRE (libraryRef xilinxun)))
      (property RLOC (string "r3c0.S1"))
   )
   (instance BU27
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "r2c0.S1"))
      (property INIT (string "6666"))
   )
   (instance BU28
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "r2c0.S1"))
   )
   (instance BU29
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "r2c0.S1"))
   )
   (instance BU31
      (viewRef view_1 (cellRef FDRE (libraryRef xilinxun)))
      (property RLOC (string "r2c0.S1"))
   )
   (instance BU33
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "r2c0.S1"))
      (property INIT (string "6666"))
   )
   (instance BU34
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "r2c0.S1"))
   )
   (instance BU35
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "r2c0.S1"))
   )
   (instance BU37
      (viewRef view_1 (cellRef FDRE (libraryRef xilinxun)))
      (property RLOC (string "r2c0.S1"))
   )
   (instance BU39
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "r1c0.S1"))
      (property INIT (string "6666"))
   )
   (instance BU40
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "r1c0.S1"))
   )
   (instance BU41
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "r1c0.S1"))
   )
   (instance BU43
      (viewRef view_1 (cellRef FDRE (libraryRef xilinxun)))
      (property RLOC (string "r1c0.S1"))
   )
   (instance BU45
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "r1c0.S1"))
      (property INIT (string "6666"))
   )
   (instance BU46
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "r1c0.S1"))
   )
   (instance BU47
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "r1c0.S1"))
   )
   (instance BU49
      (viewRef view_1 (cellRef FDRE (libraryRef xilinxun)))
      (property RLOC (string "r1c0.S1"))
   )
   (instance BU51
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "r0c0.S1"))
      (property INIT (string "6666"))
   )
   (instance BU52
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "r0c0.S1"))
   )
   (instance BU54
      (viewRef view_1 (cellRef FDRE (libraryRef xilinxun)))
      (property RLOC (string "r0c0.S1"))
   )
   (net N0
    (joined
      (portRef G (instanceRef GND))
      (portRef CI (instanceRef BU4))
      (portRef CI (instanceRef BU5))
      (portRef I2 (instanceRef BU3))
      (portRef I3 (instanceRef BU3))
      (portRef I2 (instanceRef BU9))
      (portRef I3 (instanceRef BU9))
      (portRef I2 (instanceRef BU15))
      (portRef I3 (instanceRef BU15))
      (portRef I2 (instanceRef BU21))
      (portRef I3 (instanceRef BU21))
      (portRef I2 (instanceRef BU27))
      (portRef I3 (instanceRef BU27))
      (portRef I2 (instanceRef BU33))
      (portRef I3 (instanceRef BU33))
      (portRef I2 (instanceRef BU39))
      (portRef I3 (instanceRef BU39))
      (portRef I2 (instanceRef BU45))
      (portRef I3 (instanceRef BU45))
      (portRef I2 (instanceRef BU51))
      (portRef I3 (instanceRef BU51))
    )
   )
   (net N2
    (joined
      (portRef O (instanceRef BU5))
      (portRef D (instanceRef BU7))
    )
   )
   (net N3
    (joined
      (portRef O (instanceRef BU11))
      (portRef D (instanceRef BU13))
    )
   )
   (net N4
    (joined
      (portRef O (instanceRef BU17))
      (portRef D (instanceRef BU19))
    )
   )
   (net N5
    (joined
      (portRef O (instanceRef BU23))
      (portRef D (instanceRef BU25))
    )
   )
   (net N6
    (joined
      (portRef O (instanceRef BU29))
      (portRef D (instanceRef BU31))
    )
   )
   (net N7
    (joined
      (portRef O (instanceRef BU35))
      (portRef D (instanceRef BU37))
    )
   )
   (net N8
    (joined
      (portRef O (instanceRef BU41))
      (portRef D (instanceRef BU43))
    )
   )
   (net N9
    (joined
      (portRef O (instanceRef BU47))
      (portRef D (instanceRef BU49))
    )
   )
   (net N10
    (joined
      (portRef O (instanceRef BU52))
      (portRef D (instanceRef BU54))
    )
   )
   (net N11
    (joined
      (portRef S (instanceRef BU4))
      (portRef LI (instanceRef BU5))
      (portRef O (instanceRef BU3))
    )
   )
   (net N14
    (joined
      (portRef O (instanceRef BU4))
      (portRef CI (instanceRef BU10))
      (portRef CI (instanceRef BU11))
    )
   )
   (net N17
    (joined
      (portRef S (instanceRef BU10))
      (portRef LI (instanceRef BU11))
      (portRef O (instanceRef BU9))
    )
   )
   (net N20
    (joined
      (portRef O (instanceRef BU10))
      (portRef CI (instanceRef BU16))
      (portRef CI (instanceRef BU17))
    )
   )
   (net N23
    (joined
      (portRef S (instanceRef BU16))
      (portRef LI (instanceRef BU17))
      (portRef O (instanceRef BU15))
    )
   )
   (net N26
    (joined
      (portRef O (instanceRef BU16))
      (portRef CI (instanceRef BU22))
      (portRef CI (instanceRef BU23))
    )
   )
   (net N29
    (joined
      (portRef S (instanceRef BU22))
      (portRef LI (instanceRef BU23))
      (portRef O (instanceRef BU21))
    )
   )
   (net N32
    (joined
      (portRef O (instanceRef BU22))
      (portRef CI (instanceRef BU28))
      (portRef CI (instanceRef BU29))
    )
   )
   (net N35
    (joined
      (portRef S (instanceRef BU28))
      (portRef LI (instanceRef BU29))
      (portRef O (instanceRef BU27))
    )
   )
   (net N38
    (joined
      (portRef O (instanceRef BU28))
      (portRef CI (instanceRef BU34))
      (portRef CI (instanceRef BU35))
    )
   )
   (net N41
    (joined
      (portRef S (instanceRef BU34))
      (portRef LI (instanceRef BU35))
      (portRef O (instanceRef BU33))
    )
   )
   (net N44
    (joined
      (portRef O (instanceRef BU34))
      (portRef CI (instanceRef BU40))
      (portRef CI (instanceRef BU41))
    )
   )
   (net N47
    (joined
      (portRef S (instanceRef BU40))
      (portRef LI (instanceRef BU41))
      (portRef O (instanceRef BU39))
    )
   )
   (net N50
    (joined
      (portRef O (instanceRef BU40))
      (portRef CI (instanceRef BU46))
      (portRef CI (instanceRef BU47))
    )
   )
   (net N53
    (joined
      (portRef S (instanceRef BU46))
      (portRef LI (instanceRef BU47))
      (portRef O (instanceRef BU45))
    )
   )
   (net N56
    (joined
      (portRef O (instanceRef BU46))
      (portRef CI (instanceRef BU52))
    )
   )
   (net N59
    (joined
      (portRef LI (instanceRef BU52))
      (portRef O (instanceRef BU51))
    )
   )
   (net (rename N64 "A(0)")
    (joined
      (portRef A_0_)
      (portRef DI (instanceRef BU4))
      (portRef I0 (instanceRef BU3))
    )
   )
   (net (rename N65 "A(1)")
    (joined
      (portRef A_1_)
      (portRef DI (instanceRef BU10))
      (portRef I0 (instanceRef BU9))
    )
   )
   (net (rename N66 "A(2)")
    (joined
      (portRef A_2_)
      (portRef DI (instanceRef BU16))
      (portRef I0 (instanceRef BU15))
    )
   )
   (net (rename N67 "A(3)")
    (joined
      (portRef A_3_)
      (portRef DI (instanceRef BU22))
      (portRef I0 (instanceRef BU21))
    )
   )
   (net (rename N68 "A(4)")
    (joined
      (portRef A_4_)
      (portRef DI (instanceRef BU28))
      (portRef I0 (instanceRef BU27))
    )
   )
   (net (rename N69 "A(5)")
    (joined
      (portRef A_5_)
      (portRef DI (instanceRef BU34))
      (portRef I0 (instanceRef BU33))
    )
   )
   (net (rename N70 "A(6)")
    (joined
      (portRef A_6_)
      (portRef DI (instanceRef BU40))
      (portRef I0 (instanceRef BU39))
    )
   )
   (net (rename N71 "A(7)")
    (joined
      (portRef A_7_)
      (portRef DI (instanceRef BU46))
      (portRef I0 (instanceRef BU45))
    )
   )
   (net (rename N72 "A(8)")
    (joined
      (portRef A_8_)
      (portRef I0 (instanceRef BU51))
    )
   )
   (net (rename N73 "B(0)")
    (joined
      (portRef B_0_)
      (portRef I1 (instanceRef BU3))
    )
   )
   (net (rename N74 "B(1)")
    (joined
      (portRef B_1_)
      (portRef I1 (instanceRef BU9))
    )
   )
   (net (rename N75 "B(2)")
    (joined
      (portRef B_2_)
      (portRef I1 (instanceRef BU15))
    )
   )
   (net (rename N76 "B(3)")
    (joined
      (portRef B_3_)
      (portRef I1 (instanceRef BU21))
    )
   )
   (net (rename N77 "B(4)")
    (joined
      (portRef B_4_)
      (portRef I1 (instanceRef BU27))
    )
   )
   (net (rename N78 "B(5)")
    (joined
      (portRef B_5_)
      (portRef I1 (instanceRef BU33))
    )
   )
   (net (rename N79 "B(6)")
    (joined
      (portRef B_6_)
      (portRef I1 (instanceRef BU39))
    )
   )
   (net (rename N80 "B(7)")
    (joined
      (portRef B_7_)
      (portRef I1 (instanceRef BU45))
    )
   )
   (net (rename N81 "B(8)")
    (joined
      (portRef B_8_)
      (portRef I1 (instanceRef BU51))
    )
   )
   (net (rename N82 "Q(0)")
    (joined
      (portRef Q_0_)
      (portRef Q (instanceRef BU7))
    )
   )
   (net (rename N83 "Q(1)")
    (joined
      (portRef Q_1_)
      (portRef Q (instanceRef BU13))
    )
   )
   (net (rename N84 "Q(2)")
    (joined
      (portRef Q_2_)
      (portRef Q (instanceRef BU19))
    )
   )
   (net (rename N85 "Q(3)")
    (joined
      (portRef Q_3_)
      (portRef Q (instanceRef BU25))
    )
   )
   (net (rename N86 "Q(4)")
    (joined
      (portRef Q_4_)
      (portRef Q (instanceRef BU31))
    )
   )
   (net (rename N87 "Q(5)")
    (joined
      (portRef Q_5_)
      (portRef Q (instanceRef BU37))
    )
   )
   (net (rename N88 "Q(6)")
    (joined
      (portRef Q_6_)
      (portRef Q (instanceRef BU43))
    )
   )
   (net (rename N89 "Q(7)")
    (joined
      (portRef Q_7_)
      (portRef Q (instanceRef BU49))
    )
   )
   (net (rename N90 "Q(8)")
    (joined
      (portRef Q_8_)
      (portRef Q (instanceRef BU54))
    )
   )
   (net (rename N91 "CLK")
    (joined
      (portRef CLK)
      (portRef C (instanceRef BU7))
      (portRef C (instanceRef BU13))
      (portRef C (instanceRef BU19))
      (portRef C (instanceRef BU25))
      (portRef C (instanceRef BU31))
      (portRef C (instanceRef BU37))
      (portRef C (instanceRef BU43))
      (portRef C (instanceRef BU49))
      (portRef C (instanceRef BU54))
    )
   )
   (net (rename N92 "CE")
    (joined
      (portRef CE)
      (portRef CE (instanceRef BU7))
      (portRef CE (instanceRef BU13))
      (portRef CE (instanceRef BU19))
      (portRef CE (instanceRef BU25))
      (portRef CE (instanceRef BU31))
      (portRef CE (instanceRef BU37))
      (portRef CE (instanceRef BU43))
      (portRef CE (instanceRef BU49))
      (portRef CE (instanceRef BU54))
    )
   )
   (net (rename N93 "SCLR")
    (joined
      (portRef SCLR)
      (portRef R (instanceRef BU7))
      (portRef R (instanceRef BU13))
      (portRef R (instanceRef BU19))
      (portRef R (instanceRef BU25))
      (portRef R (instanceRef BU31))
      (portRef R (instanceRef BU37))
      (portRef R (instanceRef BU43))
      (portRef R (instanceRef BU49))
      (portRef R (instanceRef BU54))
    )
   )
))))
(design adder_subtracter_spartan2_6_0_565e6fc4f8af6f53 (cellRef adder_subtracter_spartan2_6_0_565e6fc4f8af6f53 (libraryRef test_lib))
  (property X_CORE_INFO (string "C_ADDSUB_V6_0, Coregen 6.2i"))
  (property PART (string "XCV100BG256") (owner "Xilinx")))
)
