## NOTE:  Do not edit this file.
## Autogenerated by ProjNav (creatfdo.tcl) on Thu Aug 11 13:03:24 China Standard Time 2005
##
vlib work
vcom -93 -explicit  spartan2_pkgs.vhd
vcom -93 -explicit  spartan2_files.vhd
vcom -93 -explicit  spartan2_clk_wrapper.vhd
vlog  seg7_driver.v
vlog  choosen_out.v
vlog  clk_div.v
vcom -93 -explicit  top_spartan2.vhf
vcom -93 -explicit  top_tb2.vhd
vlog  "C:/xilinx_62i/verilog/src/glbl.v"
vsim -t 1ps  -L xilinxcorelib_ver -L unisims_ver  -lib work top_tb2 glbl
do top_tb2.udo
view wave
add wave *
view structure
view signals
run 1000ns
