library ieee;
use ieee.std_logic_1164.all;

entity coba is
   port(a,b : in std_logic_vector(2 downto 0);
        sel : IN STD_LOGIC_VECTOR(1 downto 0);
        y : out std_logic_vector(2 downto 0));
end coba;

architecture coba_behav of coba is
begin
   y <= a when(sel = "00") else
        b when(sel = "01");
end coba_behav;
