Release 6.2i - XPower SoftwareVersion:G.28
Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved.
Design:
pid_sysgen_clk_wrapper
Preferences:
pid_sysgen_clk_wrapper.pcf
Part:
2s50pq208-6
Data version:
PRELIMINARY,v1.0,07-31-02
Power summary:
I(mA)
P(mW)
Total estimated power consumption:
19
Vccint 2.50V:
5
12
Vcco33 3.30V:
2
7
Clocks:
3
7
Inputs:
0
1
Logic:
0
0
Outputs:
Vcco33
0
0
Signals:
0
0
Quiescent Vccint 2.50V:
2
5
Quiescent Vcco33 3.30V:
2
7
Thermal summary:
Estimated junction temperature:
26C
Ambient temp:
25C
Case temp:
26C
Theta J-A range:
34 - 35C/W
Decoupling Network Summary:
Cap Range (uF)
#
Capacitor Recommendations:
Total for Vccint
12
470.0-1000.0
1
0.470- 2.200
1
0.0470-0.2200
2
0.0100-0.0470
3
0.0010-0.0047
5
Total for Vcco33
6
470.0-1000.0
1
0.0470-0.2200
1
0.0100-0.0470
1
0.0010-0.0047
3
Analysis completed: Mon Apr 11 01:05:43 2005